1. Field of the Invention
The present invention relates generally to methods and apparatus of preparing and forming interconnections on an interposer substrate for assembling one or more semiconductor dice thereto and, particularly, providing interconnections on the interposer substrate for a first level interconnect and a second level interconnect.
2 . State of the Art
Interconnection and packaging-related issues are among the factors that determine not only the number of circuits that can be integrated on a chip but also the performance of the chip. These issues have gained importance as advances in chip design have led to reduced sizes of transistors and enhanced chip complexity. The industry has come to realize that merely having a fast chip will not necessarily result in a fast system; the fast chip must also be supported by equally fast and reliable connections. Essentially, the connections, in conjunction with the packaging, supply the chip with signals and power and redistribute the tightly packed terminals of the chip to the terminals of a carrier substrate and then to a circuit board.
One example of such an integrated circuit device is known as a “flip-chip.” Flip-chip attachment generally includes electrically and mechanically attaching a semiconductor die by its active surface to an interposer substrate or other carrier substrate using an array of discrete conductive elements formed on the semiconductor die. The discrete conductive elements are formed and bonded to bond pads on the active surface of the semiconductor die, usually during fabrication of the semiconductor die along with a large number of others in wafer form, after which the wafer is singulated into the individual semiconductor die.
The discrete conductive elements usually are configured as minute conductive bumps or balls, but also may include studs, pillars or columns of various configurations. The conductive bumps or discrete conductive elements are typically, in the case of solder balls, attached to the bond pads by first forming an under bump metal (UBM) compatible with the material of the bond pads, as well as the solder balls. The UBM for solder balls to be placed on aluminum bond pads commonly includes metal layers, bottom to top, of Cr, Cu and Au. The UBM may be formed by sputtering thin films over the aluminum bond pad through a patterning and etching process. The UBM may also be formed by an electroplating process of Cu and/or Ni with a thin Au overlay. A preformed solder ball (of, for example, 60% Sn and 40% Pb) may then be provided on the UBM and heated to a predetermined reflow temperature so as to bond the solder balls to the UBM structures on the wafer. Alternatively, a solder paste may be disposed on the UBM and then heated to liquify and form a solder ball.
Each discrete conductive element is placed corresponding to mutually aligned locations of bond pads (or other I/O locations) on the semiconductor die and terminals on the carrier substrate when the two components are superimposed. The semiconductor die is thus electrically and mechanically connected to the carrier substrate by, for example, reflowing conductive bumps of solder or curing conductive or conductor-filled epoxy bumps. A dielectric underfill may then be disposed between the die and the carrier substrate for environmental protection and to enhance the mechanical attachment of the die to the carrier substrate. For example, U.S. Pat. No. 5,710,071 to Beddingfield et al. discloses a fairly typical flip-chip attachment of a bumped semiconductor die to a carrier substrate and a method of underfilling a gap between the semiconductor die and substrate.
Flip-chip type assemblies having a bumped semiconductor die employing a carrier substrate, such as the carrier substrate disclosed in the Beddingfield et al. reference, may be undesirably thick due to the combined height of the bumped semiconductor die and carrier substrate. Ongoing goals of the computer industry include higher performance, lower cost, increased miniaturization of components, and greater packaging density of integrated circuits in, for example, a flip-chip type assembly. In an effort to meet goals such as increased miniaturization by limiting the height of a flip-chip type assembly, thin flexible interposer substrates have been introduced in the industry.
U.S. Pat. No. 5,386,341 to Olson et al. discloses such a thin flexible substrate utilized as an interposer substrate between a bumped semiconductor die and a circuit board. However, thin flexible substrates, such as that disclosed in the Olson et al. reference, require that bumps formed on the semiconductor dice be formed precisely to predetermined specifications with very low dimensional tolerances. Any failure in forming the bumps and interconnections on the semiconductor dice precisely so that the semiconductor dice align with corresponding terminals on an interposer substrate typically results in unusable semiconductor dice. Such unusable semiconductor dice may be scrapped, which is extremely costly, as a result of bad interconnections. These reliability issues are only compounded with the increased miniaturization of the semiconductor components. Furthermore, the method of forming the UBM structures and conductive bumps or solder balls on each of the bond pads on the wafer is consumptive of time, process and materials and, thus, costly.
Therefore, it would be advantageous to limit the time required for wafer bumping including the respective formation and attachment of the UBM structure and solder balls on the wafer. It would also be advantageous to prevent the loss of semiconductor dice due to failed interconnections on the semiconductor dice.